Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers

General Description The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output l

热插拔、21位、直流平衡、LVDS解串器

Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers

General Description The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output l

Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers

文件：207.54 Kbytes Page：15 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 功能：解串器 包装：托盘 描述：IC DESERIALIZER 21BIT 48TSSOP 集成电路（IC） 串行器，解串器

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 功能：解串器 包装：卷带（TR） 描述：IC DESERIALIZER 21BIT 48TSSOP 集成电路（IC） 串行器，解串器

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