Programmable DC-Balance 21-Bit Deserializers

General Description The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a sepa rate supply, all

可编程、直流平衡、21位解串器

MAX9210/MAX9214/MAX9220/MAX9222将三路LVDS串行数据输入解串为21位单端LVCMOS/LVTTL输出。随LVDS数据流接收到的并行LVDS时钟，为解串提供时序。输出具有独立的电源，允许1.8V至5V的输出逻辑电平。\n MAX9210/MAX9214/MAX9220/MAX9222具有可编程直流平衡的特点，允许利用交流耦合将串行器和解串器隔离开。解串器解码MAX9209/MAX9213等串行器所发送的数据。\n MAX9210/MAX9214具有上升沿输出锁存，当直流平衡未编程时，这些解串器兼容于非直流平衡21位解串器，如DS90CR216A和DS90CR218 \n• 直流平衡允许交流耦合，以实现更宽的输入共模电压范围 \n• 下降沿输出锁存(MAX9220/MAX9222) \n• 当/PWRDWN为低时，输出处于高阻抗，允许共用总线 \n• 非直流平衡方式支持安全失效输入 \n• 无需外围元件的PLL \n• 单独的输出电源引脚，允许接口至1.8V、2.5V、3.3V和5V逻辑 \n• LVDS输入符合ANSI TIA/EIA-644 LVDS规范 \n• +3.3V主电源供电 \n• -40°C至+85°C工作温度范围;

Programmable DC-Balance 21-Bit Deserializers

文件：1.29449 Mbytes Page：17 Pages

Programmable DC-Balance 21-Bit Deserializers

General Description The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a sepa rate supply, all

Programmable DC-Balance 21-Bit Deserializers

General Description The MAX9210/MAX9212/MAX9214/MAX9216/MAX9220/MAX9222 deserialize three LVDS serial data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a sepa rate supply, all

Programmable DC-Balance 21-Bit Deserializers

文件：1.29449 Mbytes Page：17 Pages

Programmable DC-Balance 21-Bit Deserializers

文件：194.64 Kbytes Page：17 Pages

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 功能：解串器 包装：托盘 描述：IC DESERIALIZER PROG 48TSSOP 集成电路（IC） 串行器，解串器

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 功能：解串器 包装：托盘 描述：IC DESERIALIZER PROG 48TSSOP 集成电路（IC） 串行器，解串器

Low-Cost Ringing SLIC

Introduction The Agere Systems Inc. L9214 is a subscriber line interface circuit that is optimized to provide a very low-cost solution for short- and medium-loop applications. This device provides the complete set of line interface functionality, including power ringing needed to interface to a s

Low-Cost Ringing SLIC

Introduction The Agere Systems Inc. L9214 is a subscriber line interface circuit that is optimized to provide a very low-cost solution for short- and medium-loop applications. This device provides the complete set of line interface functionality, including power ringing needed to interface to a s

Silicon NPN epitaxial planer transistor

For digital circuits ■ Features ● Costs can be reduced through downsizing of the equipment and reduction of the number of parts. ● SS-Mini type package, allowing automatic insertion through tape packing and magazine packing.

HIGH VOLTAGE ANALOG SWITCH

文件：308.95 Kbytes Page：9 Pages

HIGH VOLTAGE ANALOG SWITCH

文件：308.95 Kbytes Page：9 Pages