W-CDMA/N-CDMA Cellular Phone HBT PA Management ICs

General Description The MAX1958/MAX1959 power amplifier (PA) power-management ICs (PMICs) integrate an 800mA, dynamically adjustable step-down converter, a 5mA Rail-to-Rail® operational amplifier (op amp), and a precision temperature sensor to power a heterojunction bipolar transistor (HBT) PA in

W-CDMA/N-CDMA蜂窝电话HBT PA管理IC

MAX1958/MAX1959功率放大器(PA)电源管理IC (PMIC)是为W-CDMA和N-CDMA移动电话内的异质结型双极性晶体管(HBT) PA供电的芯片，集成了一个800mA动态可调的降压控制器、一个5mA满摆幅运算放大器、和一个精密的温度传感器。\n 该高效率、脉宽调制(PWM)、DC-DC buck转换器经过优化，提供保证的800mA输出电流。输出电压是动态控制的，可以产生0.75V至3.4V范围之间(MAX1958)或者1V至3.6V范围之间(MAX1959)的任何固定电压，且在整个电压和电流满量程变化内，建立时间小于30µs。1MHz的PWM开关频率允许使用小型外部元件，而脉 \n• 降压控制器 \n• 0.75V至3.4V的动态可调输出电压(MAX1958) \n• 1V至3.6V的动态可调输出电压(MAX1959) \n• 保证800mA输出电流 \n• 600mA负载电流时，130mV的低压差 \n• 低静态电流 \n• 跳频模式时190µA (典型值)的电源电流(MAX1958) \n• PWM模式时3mA的电源电流 \n• 关断模式时0.1µA (典型值)电流 \n• 1MHz固定频率PWM工作模式 \n• 16%至100%的占空比工作模式 \n• 无软启动所需要的外部肖特基二极管 \n• 运算放大器 \n• 5mA满摆幅输出 \n• 关断;

高动态范围、16位、80Msps ADC，具有-82dBFS的噪声底

MAX19586是一款3.3V、高速、高性能模数转换器(ADC)，具有全差分宽带采样/保持器(T/H)以及16位转换器核。MAX19586针对需要高动态特性ADC的多信道、多模式接收机进行优化。MAX19586具有-82dBFS的噪声基底，可用于极高灵敏度的接收器。\n80Msps采样速率下，MAX19586具有79.2dB信噪比(SNR)，且fIN = 70MHz时，具有84.3dBc/100dBc (SFDR1/SFDR2)的单音无杂散动态范围(SFDR)。MAX19586在2阶奈奎斯特区域和高IF输入频率下都具有极好的动态性能。例如，在130MHz频点，MAX19586能够达到82.5d ·80Msps最低采样速率\n·-82dBFS噪声基底\n·出色的动态性能\nfIN = 10MHz/70MHz和-2dBFS时，SNR为80dB/79.2dB\nfIN = 10MHz时，具有96dBc/102dBc单音SFDR1/SFDR2\nfIN = 70MHz时，具有84.3dBc/100dBc单音SFDR1/SFDR2\n·采样抖动小于0.1ps\n·1.1W功耗\n·2.56VP-P全差分模拟输入电压范围\n·CMOS兼容、2的补码数据输出格式\n·独立的数据有效时钟和超量程输出\n·灵活的输入时钟缓冲器\n·3.3V模拟电源；1.8V数字电源\n·小型8mm x 8mm x 0;

High-Dynamic-Range, 16-Bit, 80Msps ADC with -82dBFS Noise Floor

General Description The MAX19586 is a 3.3V, high-speed, high-performance analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) and a 16-bit converter core. The MAX19586 is optimized for multichannel, multimode receivers, which require the ADC to meet very

High-Dynamic-Range, 16-Bit, 80Msps ADC with -82dBFS Noise Floor

General Description The MAX19586 is a 3.3V, high-speed, high-performance analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) and a 16-bit converter core. The MAX19586 is optimized for multichannel, multimode receivers, which require the ADC to meet very

W-CDMA/N-CDMA Cellular Phone HBT PA Management ICs

General Description The MAX1958/MAX1959 power amplifier (PA) power-management ICs (PMICs) integrate an 800mA, dynamically adjustable step-down converter, a 5mA Rail-to-Rail® operational amplifier (op amp), and a precision temperature sensor to power a heterojunction bipolar transistor (HBT) PA in

High-Dynamic-Range, 16-Bit, 100Msps ADC with -82dBFS Noise Floor

文件：300.18 Kbytes Page：19 Pages

High-Dynamic-Range, 16-Bit, 100Msps ADC with -82dBFS Noise Floor

文件：300.18 Kbytes Page：19 Pages

PLL/Multibit DAC

PRODUCT OVERVIEW The AD1958 is a complete high-performance single-chip stereo digital audio playback system. It is comprised of a multibit sigmadelta modulator, digital interpolation filters, and analog output drive circuitry with an on-board dual PLL clock generator. Other features include an on

PLL/Multibit DAC

PRODUCT OVERVIEW The AD1958 is a complete high-performance single-chip stereo digital audio playback system. It is comprised of a multibit sigmadelta modulator, digital interpolation filters, and analog output drive circuitry with an on-board dual PLL clock generator. Other features include an on

PLL/Multibit DAC

PRODUCT OVERVIEW The AD1958 is a complete high-performance single-chip stereo digital audio playback system. It is comprised of a multibit sigmadelta modulator, digital interpolation filters, and analog output drive circuitry with an on-board dual PLL clock generator. Other features include an on

PLL/Multibit DAC

PRODUCT OVERVIEW The AD1958 is a complete high-performance single-chip stereo digital audio playback system. It is comprised of a multibit sigmadelta modulator, digital interpolation filters, and analog output drive circuitry with an on-board dual PLL clock generator. Other features include an on