OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

DESCRIPTION The M74HC573 is an high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with silicon gate C2MOS technology ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETRICAL OUTPU

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT） 描述：IC LATCH OCTAL D-TYPE 20-SOIC 集成电路（IC） 锁存器

Octal D-type transparent latch; 3-state

GENERAL DESCRIPTION The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inputs and outputs on opposite sides of package allowing easy interface with microp

Octal 3-State Noninverting Transparent Latch

Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS The MC74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent to data (i.e

Octal 3-State Noninverting Transparent Latch

Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS The MC74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent to data (i.e

Octal 3-State Noninverting Transparent Latch

Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS The MC74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent to data (i.e

Octal 3-State Noninverting Transparent Latch

Octal 3−State Noninverting Transparent Latch High−Performance Silicon−Gate CMOS The MC74HC573A is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. These latches appear transparent to data (i.e