SYNCHRONOUS UP/DOWN DECADE(,BINARY) COUNTER

DESCRIPTION The M54/74HC192/193 are ahigh speed CMOSSYNCHRONOUS UP/DOWN DECADE COUNTERS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 54 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28

SYNCHRONOUS UP/DOWN DECADE(,BINARY) COUNTER

DESCRIPTION The M54/74HC192/193 are ahigh speed CMOSSYNCHRONOUS UP/DOWN DECADE COUNTERS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 54 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28

SYNCHRONOUS UP/DOWN DECADE(,BINARY) COUNTER

DESCRIPTION The M54/74HC192/193 are ahigh speed CMOSSYNCHRONOUS UP/DOWN DECADE COUNTERS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 54 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28

SYNCHRONOUS UP/DOWN DECADE(,BINARY) COUNTER

DESCRIPTION The M54/74HC192/193 are ahigh speed CMOSSYNCHRONOUS UP/DOWN DECADE COUNTERS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 54 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28

SYNCHRONOUS UP/DOWN DECADE(,BINARY) COUNTER

DESCRIPTION The M54/74HC192/193 are ahigh speed CMOSSYNCHRONOUS UP/DOWN DECADE COUNTERS fabricated in silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 54 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28

Presettable synchronous 4-bit binary up/down counter

GENERAL DESCRIPTION The 74HC/HCT193 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous reversible 4-bit binary counting • Asynchronous parallel load • Asynchronous

Presettable synchronous 4-bit binary up/down counter

Presettable synchronous 4-bit binary up/down counter

1. General description The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is pulsed while CPD i

Presettable synchronous 4-bit binary up/down counter

GENERAL DESCRIPTION The 74HC/HCT193 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous reversible 4-bit binary counting • Asynchronous parallel load • Asynchronous

Presettable synchronous 4-bit binary up/down counter