HEX SCHMITT INVERTER

DESCRIPTION The M54/74HC14 is a high speed CMOS HEX SCHMITT INVERTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are the same as those of the HC04 but all inputs have 20

HEX SCHMITT INVERTER

DESCRIPTION The M74HC14 is an high speed CMOS HEX SCHMITT INVERTER fabricated with silicon gate C2MOS technology. Pin configuration and function are the same as those of the M74HC04 but all inputs have 20 Vcc hysteresis level. This, together with its schmitt trigger function, allows it to be us

Hex Schmitt inverter

Features High speed: tPD = 12 ns (typ.) at VCC = 6 V Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C High noise immunity: VH = 1.2 V (typ.) at VCC = 6 V Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) Balanced propagation delays: tPLH ≃ tPHL Wide operating voltage range: VCC (opr)

Hex Schmitt Inverter

The M74HC14 is a high speed CMOS hex Schmitt inverter fabricated with silicon gate C2MOS technology. Pin configuration and functions are the same as those of the M74HC04 but all inputs have a 20 % VCC hysteresis level.\nThis, together with the Schmitt trigger function, allows the device to be us High speed: t\nPD = 12 ns (typ.) at V\nCC = 6 V \nLow power dissipation: I\nCC = 1 μA (max.) at T\nA = 25 °C \nHigh noise immunity: V\nH = 1.2 V (typ.) at V\nCC = 6 V \nSymmetrical output impedance: |I\nOH| = I\nOL = 4 mA (min.) \nBalanced propagation delays: t\nPLH ≃ t\nPHL\nWide operating voltage ;

Hex Schmitt inverter

文件：320.65 Kbytes Page：14 Pages

Hex Schmitt inverter

Features High speed: tPD = 12 ns (typ.) at VCC = 6 V Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C High noise immunity: VH = 1.2 V (typ.) at VCC = 6 V Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) Balanced propagation delays: tPLH ≃ tPHL Wide operating voltage range: VCC (opr)

10 TO 4 LINE PRIORITY ENCODER

DESCRIPTION The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device features priority encoding of the inputs to ensure that only the

10 TO 4 LINE PRIORITY ENCODER

DESCRIPTION The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device features priority encoding of the inputs to ensure that only the

10 TO 4 LINE PRIORITY ENCODER

DESCRIPTION The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device features priority encoding of the inputs to ensure that only the

10 TO 4 LINE PRIORITY ENCODER

DESCRIPTION The M54/74HC147 is a high speed CMOS 10 TO 4 LINE PRIORITY ENCODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. This device features priority encoding of the inputs to ensure that only the

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

8 TO 3 LINE PRIORITY ENCODER

The M54/74HC148 is a high speed CMOS 8-TO-3 LINE PRIORITY ENCODER fabricated in silicon gate C2 MOS technology. It has the same high speed performance for LSTTL combined with true CMOS low power consumption. The M54/74HC148 encodes eight data lines to three-line (4-2-1) binary (octal). Casca

HEX SCHMITT INVERTER

DESCRIPTION The M54/74HC14 is a high speed CMOS HEX SCHMITT INVERTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are the same as those of the HC04 but all inputs have 20

HEX SCHMITT INVERTER

DESCRIPTION The M74HC14 is an high speed CMOS HEX SCHMITT INVERTER fabricated with silicon gate C2MOS technology. Pin configuration and function are the same as those of the M74HC04 but all inputs have 20 Vcc hysteresis level. This, together with its schmitt trigger function, allows it to be us

HEX SCHMITT INVERTER

DESCRIPTION The M74HC14 is an high speed CMOS HEX SCHMITT INVERTER fabricated with silicon gate C2MOS technology. Pin configuration and function are the same as those of the M74HC04 but all inputs have 20 Vcc hysteresis level. This, together with its schmitt trigger function, allows it to be us

HEX SCHMITT INVERTER

DESCRIPTION The M54/74HC14 is a high speed CMOS HEX SCHMITT INVERTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are the same as those of the HC04 but all inputs have 20

HEX SCHMITT INVERTER

DESCRIPTION The M54/74HC14 is a high speed CMOS HEX SCHMITT INVERTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are the same as those of the HC04 but all inputs have 20

HEX SCHMITT INVERTER

DESCRIPTION The M74HC14 is an high speed CMOS HEX SCHMITT INVERTER fabricated with silicon gate C2MOS technology. Pin configuration and function are the same as those of the M74HC04 but all inputs have 20 Vcc hysteresis level. This, together with its schmitt trigger function, allows it to be us

HEX SCHMITT INVERTER

DESCRIPTION The M54/74HC14 is a high speed CMOS HEX SCHMITT INVERTER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Pin configuration and function are the same as those of the HC04 but all inputs have 20

HEX SCHMITT INVERTER

DESCRIPTION The M74HC14 is an high speed CMOS HEX SCHMITT INVERTER fabricated with silicon gate C2MOS technology. Pin configuration and function are the same as those of the M74HC04 but all inputs have 20 Vcc hysteresis level. This, together with its schmitt trigger function, allows it to be us

HEX SCHMITT INVERTER

DESCRIPTION The M74HC14 is an high speed CMOS HEX SCHMITT INVERTER fabricated with silicon gate C2MOS technology. Pin configuration and function are the same as those of the M74HC04 but all inputs have 20 Vcc hysteresis level. This, together with its schmitt trigger function, allows it to be us

丝印代码：74HC14Y；Hex Schmitt inverter

Features High speed: tPD = 12 ns (typ.) at VCC = 6 V Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C High noise immunity: VH = 1.2 V (typ.) at VCC = 6 V Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) Balanced propagation delays: tPLH ≃ tPHL Wide operating voltage range: VCC (opr)

丝印代码：74HC14Y；Hex Schmitt inverter

Features High speed: tPD = 12 ns (typ.) at VCC = 6 V Low power dissipation: ICC = 1 μA (max.) at TA = 25 °C High noise immunity: VH = 1.2 V (typ.) at VCC = 6 V Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) Balanced propagation delays: tPLH ≃ tPHL Wide operating voltage range: VCC (opr)

Hex Schmitt inverter

文件：320.65 Kbytes Page：14 Pages

8 TO 3 LINE PRIORITY ENCODER

封装/外壳：16-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC PRIORITY ENCOD 1 X 8:3 16DIP 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC PRIORITY ENCODER 1 X 8:3 16SO 集成电路（IC） 信号开关，多路复用器，解码器

Hex Schmitt inverter

文件：320.65 Kbytes Page：14 Pages

Hex Schmitt inverter

文件：320.65 Kbytes Page：14 Pages

Hex Schmitt inverter

文件：320.65 Kbytes Page：14 Pages

Hex inverting Schmitt trigger

DESCRIPTION The 74HC14 and 74HCT14 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC14 and 74HCT14 provide six inverting buffers with Schmitt-trigger action. They are capable of tr

Hex Schmitt-Trigger Inverter

The MC74HC14A is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14A is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schm

Hex Schmitt-Trigger Inverter

The MC74HC14A is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14A is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schm

Hex Schmitt-Trigger Inverter

The MC74HC14A is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14A is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schm

Hex Schmitt-Trigger Inverter

The MC74HC14A is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14A is useful to “square up” slow input rise and fall times. Due to hysteresis voltage of the Schm