DESCRIPTION

The LPR520 is functionally compatible with the L29C520 but have 16-bit inputs and outputs. The LPR520 is implemented in low power CMOS.

The LPR520 contains four registers which can be configured as two independent, 2-level pipelines or as one 4-level pipeline.

FEATURES

❑ Four 16-bit Registers

❑ Implements Double 2-Stage Pipeline or Single 4-Stage Pipeline Register

❑ Hold, Shift, and Load Instructions

❑ Separate Data In and Data Out Pins

❑ High-Speed, Low Power CMOS Technology

❑ Three-State Outputs

❑ 44-pin PLCC, J-Lead