Precision Clock Conditioner with Integrated PLL

1 Features 1• 20 fs Additive Jitter • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz • Clock Output Frequency Range of 1 to 800 MHz • 3 LVDS and 5 LVPECL Clock Outputs • Dedicated Divider and Delay Blocks on Each Clock Output • Pin Compatible

具有集成 PLL 和 3 个 LVDS/5 个 LVPECL 输出的 1 至 800MHz 精密时钟分配器

The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), three LVDS, and five LVPECL clock output distribution blocks.\n\nEach • 20 fs Additive Jitter\n• Clock Output Frequency Range of 1 to 800 MHz\n• Dedicated Divider and Delay Blocks on Each Clock Output\n• 3.15 to 3.45 V Operation\n• Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm);

Precision Clock Conditioner with Integrated PLL

文件：444.71 Kbytes Page：20 Pages

Precision Clock Conditioner

文件：814.02 Kbytes Page：24 Pages

selecting amplifiers, adcs, and clocks for high-performance signal paths

文件：551.31 Kbytes Page：14 Pages

丝印代码：K02000I；Precision Clock Conditioner with Integrated PLL

1 Features 1• 20 fs Additive Jitter • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz • Clock Output Frequency Range of 1 to 800 MHz • 3 LVDS and 5 LVPECL Clock Outputs • Dedicated Divider and Delay Blocks on Each Clock Output • Pin Compatible

丝印代码：K02000I；Precision Clock Conditioner with Integrated PLL

1 Features 1• 20 fs Additive Jitter • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz • Clock Output Frequency Range of 1 to 800 MHz • 3 LVDS and 5 LVPECL Clock Outputs • Dedicated Divider and Delay Blocks on Each Clock Output • Pin Compatible

丝印代码：K02000I；Precision Clock Conditioner with Integrated PLL

1 Features 1• 20 fs Additive Jitter • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz • Clock Output Frequency Range of 1 to 800 MHz • 3 LVDS and 5 LVPECL Clock Outputs • Dedicated Divider and Delay Blocks on Each Clock Output • Pin Compatible

丝印代码：K02000I；Precision Clock Conditioner with Integrated PLL

1 Features 1• 20 fs Additive Jitter • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz • Clock Output Frequency Range of 1 to 800 MHz • 3 LVDS and 5 LVPECL Clock Outputs • Dedicated Divider and Delay Blocks on Each Clock Output • Pin Compatible

功能：时钟分配 包装：盒 描述：BOARD EVALUATION FOR LMK02000 开发板，套件，编程器 评估和演示板及套件

功能：时钟分配 包装：盒 描述：BOARD EVAL FOR LMK02000-2 开发板，套件，编程器 评估和演示板及套件

Precision Clock Conditioner with Integrated PLL

文件：444.71 Kbytes Page：20 Pages

Precision Clock Conditioner

文件：814.02 Kbytes Page：24 Pages

Precision Clock Conditioner

文件：814.02 Kbytes Page：24 Pages

Precision Clock Conditioner with Integrated PLL

文件：444.71 Kbytes Page：20 Pages

Precision Clock Conditioner

文件：814.02 Kbytes Page：24 Pages

Precision Clock Conditioner

文件：814.02 Kbytes Page：24 Pages

VOLTAGE PROTECTION FOR DC SOLID-STATE RELAYS

文件：860.51 Kbytes Page：5 Pages

Coarse Wavelength Division Multiplexer (CWDM) Add/Drop Filter

文件：162.11 Kbytes Page：3 Pages