位置:首页 > IC中文资料 > LFE5UM

LFE5UM价格

参考价格:¥325.1456

型号:LFE5UM-45F-6BG381I 品牌:LATTICE SEMICONDUCTOR 备注:这里有LFE5UM多少钱,2026年最近7天走势,今日出价,今日竞价,LFE5UM批发/采购报价,LFE5UM行情走势销售排行榜,LFE5UM报价。
型号 功能描述 生产厂家 企业 LOGO 操作

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5 Versa Development Board User Guide

Features • Half-length PCI Express form-factor —Allows demonstration of PCI Express x1 interconnection • Electrical testing of one full-duplex SERDES channel via SMA connections • USB-B connection for UART and device programming • Two RJ45 interfaces to 10/100/1000 Ethernet to RGMII • On-bo

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

ECP5™ and ECP5-5G™ Family

General Description The ECP5/ECP5-5G family of FPGA devices is optimized to deliver high performance features such as an enhanced DSP architecture, high speed SERDES (Serializer/Deserializer), and high speed source synchronous interfaces, in an economical FPGA fabric. This combination is achieved

LATTICE

莱迪思

更新时间:2026-3-18 18:17:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
LATTICE(莱迪斯)
2021+
CSFBGA-285(10x10)
499
Lattice Semiconductor Corporat
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!
Lattice(莱迪斯)
25+
CSFBGA-285(10x10)
500000
源自原厂成本,高价回收工厂呆滞
LATTICE(莱迪斯)
2447
CABGA-381(17x17)
31500
90个/托盘一级代理专营品牌!原装正品,优势现货,长
LatticeSemiconductorCorp
24+
381-CABGA(17x17)
66800
原厂授权一级代理,专注汽车、医疗、工业、新能源!
Lattice Semiconductor Corporat
24+
381-CABGA(17x17)
65200
一级代理/放心采购
Lattice Semiconductor
24+
BGA381
12800
强势渠道订货 7-10天
Lattice Semiconductor Corporat
23+
381-FBGA
11200
主营:汽车电子,停产物料,军工IC
Lattice
20+
BGA-381
29860
Lattice全新FPGA-可开原型号增税票
Lattice(莱迪斯)
2021/2022+
标准封装
3500
原厂原装现货订货价格优势终端BOM表可配单提供样品

LFE5UM数据表相关新闻