丝印代码：LC841A；10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Operates From 1.65 V to 3.6 V · Inputs Accept Voltages to 5.5 V · Max tpd of 6.7 ns at 3.3 V · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Ioff Supports Partial-Power-Down Mode Oper

丝印代码：LC841A；10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Operates From 1.65 V to 3.6 V · Inputs Accept Voltages to 5.5 V · Max tpd of 6.7 ns at 3.3 V · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Ioff Supports Partial-Power-Down Mode Oper

丝印代码：LC841A；10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Operates From 1.65 V to 3.6 V · Inputs Accept Voltages to 5.5 V · Max tpd of 6.7 ns at 3.3 V · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Ioff Supports Partial-Power-Down Mode Oper

丝印代码：LC841A；10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Operates From 1.65 V to 3.6 V · Inputs Accept Voltages to 5.5 V · Max tpd of 6.7 ns at 3.3 V · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Ioff Supports Partial-Power-Down Mode Oper

丝印代码：LC841A；10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Operates From 1.65 V to 3.6 V · Inputs Accept Voltages to 5.5 V · Max tpd of 6.7 ns at 3.3 V · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Ioff Supports Partial-Power-Down Mode Oper

丝印代码：LC841A；10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Operates From 1.65 V to 3.6 V · Inputs Accept Voltages to 5.5 V · Max tpd of 6.7 ns at 3.3 V · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Ioff Supports Partial-Power-Down Mode Oper

丝印代码：LC841A；10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS

FEATURES · Operates From 1.65 V to 3.6 V · Inputs Accept Voltages to 5.5 V · Max tpd of 6.7 ns at 3.3 V · Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C · Ioff Supports Partial-Power-Down Mode Oper

N-CHANNEL ENHANCEMENT-MODE SILICON GATE TMOS POWER FIELD EFFECT TRANSISTOR

N-CHANNEL POWER MOSFETS

FEATURES • Lower RDS(ON) • Improved inductive ruggedness • Fast switching times • Rugged polysilicon gate cell structure • Lower input capacitance • Extended safe operation area • Improved high temperature reliability

PIN PHOTODIODE

Description Large area planar silicon photodiode mounted on a two lead PC board substrate. A clear molded lens is used to increase sensitivity. Low junction capacitance permits fast response time. Features • High photo sensitivity • Low junction capacitance • High cut-off frequency • Fast sw

PIN PHOTODIODE

Description Large area planar silicon photodiode mounted on a two lead PC board substrate. A clear molded lens is used to increase sensitivity. Low junction capacitance permits fast response time. Features • High photo sensitivity • Low junction capacitance • High cut-off frequency • Fast sw

TO-220 8A Triac

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