CRT Display Synchronization Deflection Circuit

Overview The LA7853 is a sync deflection circuit IC dedicated to CRT display use. It can be connected to the LA7832, 7833, 7837, 7838 (for vertical output use) to form a sync deflection circuit that meets every requirement for CRT displayuse. So far, ICs for color TV use have been applied to

CRT Display Synchronization Deflection Circuit

3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs

GENERAL DESCRIPTION The AD7853/AD7853L are high speed, low power, 12-bit ADCs that operate from a single 3 V or 5 V power supply, the AD7853 being optimized for speed and the AD7853L for low power. The ADC powers up with a set of default conditions at which time it can be operated as a read-only

3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs

GENERAL DESCRIPTION The AD7853/AD7853L are high speed, low power, 12-bit ADCs that operate from a single 3 V or 5 V power supply, the AD7853 being optimized for speed and the AD7853L for low power. The ADC powers up with a set of default conditions at which time it can be operated as a read-only

3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs

GENERAL DESCRIPTION The AD7853/AD7853L are high speed, low power, 12-bit ADCs that operate from a single 3 V or 5 V power supply, the AD7853 being optimized for speed and the AD7853L for low power. The ADC powers up with a set of default conditions at which time it can be operated as a read-only

3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs

GENERAL DESCRIPTION The AD7853/AD7853L are high speed, low power, 12-bit ADCs that operate from a single 3 V or 5 V power supply, the AD7853 being optimized for speed and the AD7853L for low power. The ADC powers up with a set of default conditions at which time it can be operated as a read-only

3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs

GENERAL DESCRIPTION The AD7853/AD7853L are high speed, low power, 12-bit ADCs that operate from a single 3 V or 5 V power supply, the AD7853 being optimized for speed and the AD7853L for low power. The ADC powers up with a set of default conditions at which time it can be operated as a read-only