GENERAL DESCRIPTION

The IS25LQ080 is 8 Mbit Serial Peripheral Interface (SPI) Flash memories, providing single-, dual or quad output. The devices are designed to support a 33 MHz fclock rate in normal read mode, and 104 MHz in fast read (Quad output is 100MHz), the fastest in the industry. The devices use a single low voltage power supply, ranging from 2.3 Volt to 3.6 Volt, to perform read, erase and program operations. The devices can be programmed in standard EPROM programmers.

FEATURES

• Single Power Supply Operation

- Low voltage range: 2.3 V - 3.6 V

• Memory Organization

- IS25LQ080: 1024K x 8 (8 Mbit)

• Cost Effective Sector/Block Architecture

- 8Mb : Uniform 4KByte sectors / sixteen uniform 64KByte blocks

• Serial Peripheral Interface (SPI) Compatible

- Supports single-, dual- or quad-output

- Supports SPI Modes 0 and 3

- Maximum 33 MHz clock rate for normal read

- Maximum 104 MHz clock rate for fast read

- Maximum 208MHz clock rate

- Maximum 400MHz clock rate equivalent Quad SPI

• Byte Program Operation

- Typical 10 us/Byte

• Page Program (up to 256 Bytes) Operation

- Maximum 0.7ms per page program

• Sector, Block or Chip Erase Operation

- Sector Erase (4KB)150ms (Typ)

- Block Erase (64KB)500ms (Typ)

- Chip Erase 2s (8Mb)

• Low Power Consumption

- Max 12 mA active read current

- Max 20 mA program/erase current

- Max 30 uA standby current

• Hardware Write Protection

- Protect and unprotect the device from write operation by Write Protect (WP#) Pin

• Software Write Protection

- The Block Protect (BP3, BP2, BP1, BP0) bits allow partial or entire memory to be configured as read-only

• High Product Endurance

- Guaranteed 100,000 program/erase cycles per single sector

- Minimum 20 years data retention

• Industrial Standard Pin-out and Package

- 8-pin 208mil SOIC

- 8-pin 150mil VVSOP

- 8-contact WSON

- PDIP

- Lead-free (Pb-free) package

•Additional 256-byte Security information one-time programmable (OTP) area

•Special protect function

- Safe guard function (Appendix 1)

- Sector unlock function (Appendix 2)