Triple Output Regulator with Single Synchronous Buck and Dual LDO

The ISL6415 is a highly integrated triple output regulator which provides a single chip solution for wireless chipset power management. The device integrates a high efficiency synchronous buck regulator with two ultra low noise LDO regulators. The IC accepts an input voltage range of 3.0V to 3.6V and provides three regulated output voltages: 1.2V (PWM), 1.8V (LDO1), and another ultra-clean 1.8V (LDO2).

Features

• Fully Integrated Synchronous Buck Regulator + Dual LDO

• High Output Current (For QFN package)

- PWM, 1.2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA

- LDO1, 1.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA

- LDO2, 1.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA

• Ultra-Compact DC-DC Converter Design

• Stable with Small Ceramic Output Capacitors

• High Conversion Efficiency

• Low Shutdown Supply Current

• Ultra-Low Dropout Voltage for LDOs

- LDO1, 1.8V. . . . . . . . . . . . . . . . 125mV (typ.) at 300mA

- LDO2, 1.8V. . . . . . . . . . . . . . . . 100mV (typ.) at 200mA

• Ultra-Low Output Voltage Noise

- <30µVRMS (typ.) for LDO2 (VCO Supply)

• PG_LDO, PG_PWM and PG_PWM outputs

• Extensive Circuit Protection and Monitoring Features

- Overvoltage protection

- Overcurrent protection

- Shutdown

- Thermal Shutdown

• Integrated RESET output for microprocessor reset

• Proven Reference Design for Total WLAN System Solution

• QFN Package

- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat

No Leads - Product Outline

- Near Chip-Scale Package Footprint Improves PCB

Efficiency and Is Thinner in Profile

• Pb-Free Available (RoHS Compliant)

Applications

• WLAN Cards

- PCMCIA, Cardbus-32, Mini-PCI Cards

- Compact Flash Cards

• Liberty Chipset

• Hand-Held Instruments