Description

The HM-6504 is a 4096 x 1 static CMOS RAM fabricated using self-aligned silicon gate technology. The device utilizes synchronous circuitry to achieve high performance and low power operation.

Features

• Low Power Standby . . . . . . . . . . . . . . . . . . . 125µW Max

• Low Power Operation . . . . . . . . . . . . . 35mW/MHz Max

• Data Retention . . . . . . . . . . . . . . . . . . . . . . . at 2.0V Min

• TTL Compatible Input/Output

• Three-State Output

• Standard JEDEC Pinout

• Fast Access Time. . . . . . . . . . . . . . . . . . 120/200ns Max

• 18 Lead Package for High Density

• On-Chip Address Register

• Gated Inputs - No Pull Up or Pull Down Resistors Required