Description

The CD54AC164/3A and CD54ACT164/3A are 8-bit serialin/parallel-out shift registers with asynchronous reset that utilize the Harris Advanced CMOS Logic technology. Data are shifted on the positive edge of the clock (CP). A LOW on the Master Reset (MR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (DS1 and DS2) are provided; either one can be used as a Data Enable control.

The CD54AC164/3A and CD54ACT164/3A are supplied in 14 lead dual-in-line ceramic packages (F suffix).