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5962F9863201VCC中文资料

厂家型号

5962F9863201VCC

文件大小

39.33Kbytes

页面数量

2

功能描述

Radiation Hardened Dual J-K Flip-Flop with Set and Reset

数据手册

下载地址一下载地址二到原厂下载

生产厂商

INTERSIL

5962F9863201VCC数据手册规格书PDF详情

Radiation Hardened Dual J-K Flip-Flop with Set and Reset

The Radiation Hardened ACS109MS is a Dual J-K Flip Flop with Set and Reset. These Flip-Flops have independent J, K, Set, Reset, and Clock inputs and Q and Q outputs. The outputs change state on the positive-going transition of the clock. Set and Reset are accomplished asynchronously by Low-level inputs. All inputs are buffered and the outputs are designed for balanced propagation delay and transition times.

Features

• QML Qualified Per MIL-PRF-38535 Requirements

• 1.25 Micron Radiation Hardened SOS CMOS

• Radiation Environment

- Latch-Up Free Under Any Conditions

- Total Dose (Max.) . . . . . . . . . . . . . . . . . 3 x 105 RAD(Si)

- SEU Immunity . . . . . . . . . . . . . <1 x 10-10 Errors/Bit/Day

- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm2)

• Input Logic Levels. . . . VIL= (0.3)(VCC), VIH= (0.7)(VCC)

• Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA (Min)

• Quiescent Supply Current . . . . . . . . . . . . . . . 10µA (Max)

• Propagation Delay . . . . . . . . . . . . . . . . . . . . . .25ns (Max)

Applications

• High Speed Control Circuits

• Sensor Monitoring

• Low Power Designs

更新时间:2026-3-7 15:08:00
供应商 型号 品牌 批号 封装 库存 备注 价格
INTERSIL
三年内
1983
只做原装正品
INTERSIL
2447
20
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货
INTERSIL
14+
原厂封装
8
宇航IC只做原装假一罚十
INTERSIL
25+
N/A
90000
一级代理商进口原装现货、价格合理
INTERSIL
24+
10
全新原装
INTERSIL
2015+
118
原装正品
INTERSIL
2022+
10
只做原装,价格优惠,长期供货。
INTERSIL
23+
3
5000
原厂授权代理,海外优势订货渠道。可提供大量库存,详
INTERSIL
25+
115
公司优势库存 热卖中!
H
24+
CDIP
66800
原厂授权一级代理,专注汽车、医疗、工业、新能源!