Features

• USB-PD

- Supports two USB-PD ports

- Supports latest USB-PD 3.0 version 2.0 including programmable power supply (PPS) mode

- Extended data messaging (EDM)

• Type-C

- Configurable resistors RP and RD

- VBUS NFET gate driver

- Integrated 100-mW VCONN power supply and control

• 2x buck-boost controller

- 150 kHz to 600 kHz switching frequency

- 5.5 V to 24 V input, 40 V tolerant

- 3.3 V to 21.5 V output

- 20-mV voltage and 50-mA current steps for PPS

- Supports selectable pulse skipping mode (PSM) and forced continuous conduction mode (FCCM)

- Supports soft start

- Programmable spread spectrum frequency modulation for low EMI

- Programmable phase shift across two ports to further reduce the EMI

• 2x legacy/proprietary charging blocks

- Supports QC4+, QC4.0, Samsung AFC, Apple 2.4A, and BC v1.2 charging protocols

• Integrated voltage (VBUS) regulation and current sense amplifier (CSA)

- Integrated shunt regulator function for VBUS control

- Constant current or constant voltage mode

- Supports current sensing for constant current control

• System-level fault protection

- On-chip VBUS, overvoltage protection (OVP), overcurrent protection (OCP), undervoltage protection (UVP)

- VBUS to CC short protection

- Under-voltage lockout (UVLO)

- Supports over-temperature protection through integrated ADC circuit and internal temperature sensor

- Supports connector and board temperature measurement using external thermistors

• 32-bit MCU subsystem

- 48-MHz Arm® Cortex®-M0 CPU

- 128-KB flash

- 16-KB SRAM

- 32-KB ROM

• Peripherals and GPIOs

- 19 GPIOs

- Two over-voltage GPIOs

- 3x 8-bit ADC

- 4x 16-bit timer/counter/PWMs (TCPWM)

• Communication interfaces

- 4x SCBs (I2

C/SPI/UART)

• Clocks and oscillators

- Integrated oscillator eliminating the need for an external clock

• Power supply

- 4 V to 24 V input (40-V tolerant)

- 3.3 V to 21.5 V output

- Integrated LDO capable of 5 V @ 150 mA

• Packages

- 68-pin QFN (8 mm  8 mm) package with –40 °C to +105 °C extended industrial temperature range Logic block diagram