Features

• 2-Mbit ferroelectric random access memory (F-RAM) logically organized as 256K × 8

- Virtually unlimited endurance of 100 trillion (1014) read/write cycles

- 151-year data retention (See “Data retention and endurance” on page 96)

- Infineon instant non-volatile write technology

- Advanced high-reliability ferroelectric process

• Single and multi I/O SPI

- Serial bus interface SPI protocols

- Supports SPI mode 0 (0, 0) and mode 3 (1, 1) for all SDR mode transfers

- Supports SPI mode 0 (0, 0) for all DDR mode transfers

- Extended I/O SPI protocols

- Dual SPI (DPI) protocols

- Quad SPI (QPI) protocols

• SPI clock frequency

- Up to 108-MHz frequency SPI SDR

- Up to 54-MHz frequency SPI DDR

• Execute-in-place (XIP) for memory read/write

• Write protection, data security, and data integrity

• Hardware protection using the write protect (WP) pin

• Software block protection

• Embedded ECC and CRC for enhanced data integrity

- ECC detects and corrects 1-bit error. If a 2-bit error occurs, it does not correct but reports through the ECC

Status register

- CRC detects any accidental change to raw data

• Extended electronic signatures

- Device ID includes manufacturer ID and product ID

- Unique ID

- User programmable serial number

• Dedicated 256-byte special sector F-RAM

- Dedicated special sector write and read

- Content can survive up to three standard reflow cycles

• Low-power consumption at high speed

- 10 mA (typ) active current for 108 MHz SPI SDR

- 16 mA (typ) active current for 108 MHz QSPI SDR and 54-MHz QSPI DDR

- 110 μA (typ) standby current

- 0.80 μA (typ) deep power down mode current

- 0.1 μA (typ) hibernate mode current

• Low-voltage operation:

- CY15V102QSN: VDD = 1.71 V to 1.89 V

- CY15B102QSN: VDD = 1.8 V to 3.6 V