位置:IDT74ALVCH162721PA > IDT74ALVCH162721PA详情

IDT74ALVCH162721PA中文资料

厂家型号

IDT74ALVCH162721PA

文件大小

111.76Kbytes

页面数量

6

功能描述

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

数据手册

下载地址一下载地址二到原厂下载

生产厂商

IDT

IDT74ALVCH162721PA数据手册规格书PDF详情

DESCRIPTION:

This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the clock-enable (CLKEN) input is low. If CLKEN is high, no data is stored.

FEATURES:

– 0.5 MICRON CMOS Technology

– Typical tSK(0) (Output Skew) < 250ps

– ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

– 0.635mm pitch SSOP, 0.50mm pitch TSSOP, and 0.40mm pitch TVSOP packages

– Extended commercial range of – 40°C to + 85°C

– VCC = 3.3V ± 0.3V, Normal Range

– VCC = 2.7V to 3.6V, Extended Range

– VCC = 2.5V ± 0.2V

– CMOS power levels (0.4µ W typ. static)

– Rail-to-Rail output swing for increased noise margin

Drive Features for ALVCH162721:

– Balanced Output Drivers: ±12mA

– Low switching noise

APPLICATIONS:

• 3.3V High Speed Systems

• 3.3V and lower voltage computing systems

更新时间:2025-12-2 11:00:00
供应商 型号 品牌 批号 封装 库存 备注 价格
IDT
23+
TSSOP-56
50000
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IDT
21+
TSSOP-56
10000
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IDT
23+
TSSOP-56
4200
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IDT
24+
NA/
4560
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IDT
2025+
TSSOP-56
3550
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IDT
24+
TSSOP-56
60000
IDT
NEW
56TSSOP
9526
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05+
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4639
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IDT
23+
SSOP
7000
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IDT
13+
NA
2630
全新进口原装