位置:IDT72511L50JB > IDT72511L50JB详情

IDT72511L50JB中文资料

厂家型号

IDT72511L50JB

文件大小

434.59Kbytes

页面数量

28

功能描述

PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18

数据手册

下载地址一下载地址二到原厂下载

生产厂商

IDT

IDT72511L50JB数据手册规格书PDF详情

DESCRIPTION:

The IDT72511 and IDT72521 are highly integrated first-in, first-out memories that enhance processor-to-processor and processor-to-peripheral communications. IDT BiFIFOs integrate two side-by-side memory arrays for data transfers in two directions.

FEATURES:

• Two side-by-side FIFO memory arrays for bidirectional

data transfers

• 512 x 18-Bit - 512 x 18-Bit (IDT72511)

• 1024 x 18-Bit - 1024 x 18-Bit (IDT72521)

• 18-bit data buses on Port A side and Port B side

• Can be configured for 18-to-18-bit or 36-to-36-bit communication

• Fast 35ns access time

• Fully programmable standard microprocessor interface

• Built-in bypass path for direct data transfer between two

ports

• Two fixed flags, Empty and Full, for both the A-to-B and

the B-to-A FIFO

• Two programmable flags, Almost-Empty and Almost-Full

for each FIFO

• Programmable flag offset can be set to any depth in the

FIFO

• Any of the eight flags can be assigned to four external

flag pins

• Flexible reread/rewrite capabilities

• Six general-purpose programmable I/O pins

• Standard DMA control pins for data exchange with

peripherals

• 68-pin PGA and PLCC packages

更新时间:2025-11-29 14:31:00
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