Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS The IW4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive- and negativegoing signals. The d

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS The IW4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive- and negative going signals. The

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS

Quad 2-Input NAND Schmitt Trigger

Appliance Outlet F-Horizontal, Snap-in Mounting, Front Side, Solder or Quick-connect Terminal

Description - Panel Mount: Snap-in version, from front side - Connector, Pin temperature 70 °C, protection class I or II - Solder terminals or quick connect terminals

Quadruple 2-input NAND Schmitt trigger

DESCRIPTION The HEF4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage (VP) and the n

Quad 2-input NAND Schmitt trigger

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

Quad 2-input NAND Schmitt trigger

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

High Voltage CMOS Logic ICs >Gate>

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