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型号	功能描述	生产厂家企业	LOGO
IS67WVC1M16EALL	16Mb Async/Page/Burst CellularRAM 1.5 Features ⚫ Single device supports asynchronous , page, and burst operation ⚫ Mixed Mode supports asynchronous write and synchronous read operation ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Asynchronous mode	ISSI 矽成半导体	ISSI
IS67WVC1M16EALL-7010BLA1	16Mb Async/Page/Burst CellularRAM 1.5 Features ⚫ Single device supports asynchronous , page, and burst operation ⚫ Mixed Mode supports asynchronous write and synchronous read operation ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Asynchronous mode	ISSI 矽成半导体	ISSI
IS67WVC1M16ECLL	16Mb Async/Page/Burst CellularRAM 1.5 Features ⚫ Single device supports asynchronous , page, and burst operation ⚫ Mixed Mode supports asynchronous write and synchronous read operation ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Asynchronous mode	ISSI 矽成半导体	ISSI
IS67WVC1M16ECLL-7010BLA1	16Mb Async/Page/Burst CellularRAM 1.5 Features ⚫ Single device supports asynchronous , page, and burst operation ⚫ Mixed Mode supports asynchronous write and synchronous read operation ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Asynchronous mode	ISSI 矽成半导体	ISSI
IS67WVC4M16EALL	64Mb Async/Page/Burst CellularRAM 1.5 Features ⚫ Single device supports asynchronous , page, and burst operation ⚫ Mixed Mode supports asynchronous write and synchronous read operation ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Asynchronous mode	ISSI 矽成半导体	ISSI
IS67WVC4M16EALL-7010BLA1	64Mb Async/Page/Burst CellularRAM 1.5 Features ⚫ Single device supports asynchronous , page, and burst operation ⚫ Mixed Mode supports asynchronous write and synchronous read operation ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Asynchronous mode	ISSI 矽成半导体	ISSI
IS67WVC4M16ECLL	64Mb Async/Page/Burst CellularRAM 1.5 Features ⚫ Single device supports asynchronous , page, and burst operation ⚫ Mixed Mode supports asynchronous write and synchronous read operation ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Asynchronous mode	ISSI 矽成半导体	ISSI
IS67WVC4M16ECLL-7010BLA1	64Mb Async/Page/Burst CellularRAM 1.5 Features ⚫ Single device supports asynchronous , page, and burst operation ⚫ Mixed Mode supports asynchronous write and synchronous read operation ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Asynchronous mode	ISSI 矽成半导体	ISSI
IS67WVE1M16EALL	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16EBLL	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16ECLL	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16TALL	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16TALL-70BLA1	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16TBLL	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16TBLL-70BLA1	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16TBLL-70BLA2	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16TCLL	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE1M16TCLL-70BLA1	16Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE2M16EALL	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16EALL-70BLA1	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16EALL-70BLA2	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16EBLL-70BLA1	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16ECLL-70BLA1	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16EEBLL	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16EECLL	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16TALL	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16TALL-70BLA1	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16TBLL-70BLA1	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16TCLL-70BLA1	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16TTBLL	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE2M16TTCLL	32Mb Async/Page PSRAM Features ⚫ Asynchronous and page mode interface ⚫ Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V ⚫ Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE4M16EALL	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16EALL-70BLA1	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16EBLL	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16EBLL-70BLA1	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16EBLL-70BLA2	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16ECLL	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16ECLL-70BLA1	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16TALL	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16TALL-70BLA1	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16TBLL	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16TBLL-70BLA1	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16TBLL-70BLA2	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16TCLL	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE4M16TCLL-70BLA1	64Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access InterpageRead access : 60ns, 70ns IntrapageRead access : 25n	ISSI 矽成半导体	ISSI
IS67WVE51216EALL	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216EALL-70BLA1	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216EBLL	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216ECLL	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216TALL	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216TALL-70BLA1	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216TBLL	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216TBLL-70BLA1	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216TCLL	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVE51216TCLL-70BLA1	8Mb Async/Page PSRAM Features  Asynchronous and page mode interface  Dual voltage rails for optional performance  ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95V  BLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6V  CLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V  Page mode read access  Interpage Read access : 60ns, 70ns  Intrapage Read acce	ISSI 矽成半导体	ISSI
IS67WVH64M8EALL-166BLA1	IS66WVH64M8EALL Features HyperBusTM Low Signal Count Interface ◼ 1.7 to 2.0V (1.8V typ.) and 2.7 to 3.6V (3.0 V typ.) interface support ◼ Single-ended clock (CK) – 11 bus signals ◼ Optional differential clock (CK, CK#) – 12 bus signals ◼ Chip Select (CS#) ◼ 8-bit data bus (DQ [7:0]) ◼ Hardware reset (RES	ISSI 矽成半导体	ISSI
IS67WVH64M8EALL-166BLA2	IS66WVH64M8EALL Features HyperBusTM Low Signal Count Interface ◼ 1.7 to 2.0V (1.8V typ.) and 2.7 to 3.6V (3.0 V typ.) interface support ◼ Single-ended clock (CK) – 11 bus signals ◼ Optional differential clock (CK, CK#) – 12 bus signals ◼ Chip Select (CS#) ◼ 8-bit data bus (DQ [7:0]) ◼ Hardware reset (RES	ISSI 矽成半导体	ISSI
IS67WVH64M8EALL-166BLI	IS66WVH64M8EALL Features HyperBusTM Low Signal Count Interface ◼ 1.7 to 2.0V (1.8V typ.) and 2.7 to 3.6V (3.0 V typ.) interface support ◼ Single-ended clock (CK) – 11 bus signals ◼ Optional differential clock (CK, CK#) – 12 bus signals ◼ Chip Select (CS#) ◼ 8-bit data bus (DQ [7:0]) ◼ Hardware reset (RES	ISSI 矽成半导体	ISSI
IS67WVH64M8EALL-200BLA1	IS66WVH64M8EALL Features HyperBusTM Low Signal Count Interface ◼ 1.7 to 2.0V (1.8V typ.) and 2.7 to 3.6V (3.0 V typ.) interface support ◼ Single-ended clock (CK) – 11 bus signals ◼ Optional differential clock (CK, CK#) – 12 bus signals ◼ Chip Select (CS#) ◼ 8-bit data bus (DQ [7:0]) ◼ Hardware reset (RES	ISSI 矽成半导体	ISSI
IS67WVH64M8EALL-200BLA2	IS66WVH64M8EALL Features HyperBusTM Low Signal Count Interface ◼ 1.7 to 2.0V (1.8V typ.) and 2.7 to 3.6V (3.0 V typ.) interface support ◼ Single-ended clock (CK) – 11 bus signals ◼ Optional differential clock (CK, CK#) – 12 bus signals ◼ Chip Select (CS#) ◼ 8-bit data bus (DQ [7:0]) ◼ Hardware reset (RES	ISSI 矽成半导体	ISSI

IS67产品属性

类型
描述
型号
IS67
制造商
IDEC Corporation
功能描述
SENS.IND. 10-30VDC NPN NO

IS67供应商更多...

更新时间：2025-12-30 11:09:00

IC供应商	芯片型号	品牌	批号	封装	库存	备注	价格
贸泽芯城（深圳）电子科技有限公司	IS67WVC4M16ALL-7010BLA1	ISSI	23+	BGA	10000	原厂授权一级代理,专业海外优势订货,价格优势、品种	询价
深圳市华斯顿科技有限公司	IS67WVC4M16ALL-7010BLA1	ISSI	25+23+	BGA	20799	绝对原装正品全新进口深圳现货	询价
深圳市星辰微电科技有限公司	IS67WVC1M16EALL	ISSI	23+	BGA	4500	ISSI存储芯片在售	询价
深圳市安富世纪电子有限公司	IS67WVC4M16ALL-7010BLA1	ISSI, Integrated Silicon Solu	23+	54-VFBGA6x8	7300	专注配单,只做原装进口现货	询价
艾睿（深圳）半导体有限公司	IS67WVC4M16ALL-7010BLA1	ISSIINTEGRATEDSILICONSOLUTIONI	2447	SMD	100500	一级代理专营品牌!原装正品,优势现货,长期排单到货	询价
深圳市威尔健半导体有限公司	IS67WVE4M16BLL	NA	23+	BGA	50000	全新原装正品现货,支持订货	询价
深圳市芯为科技有限公司	IS67WVC4M16ALL-7010BLA1	ISSI	25+	电联咨询	7800	公司现货,提供拆样技术支持	询价
深圳市卓越微芯电子有限公司	IS67WVC4M16ALL-7010BLA1	ISSI	25+	VFBGA(54)	3850	百分百原装正品真实公司现货库存本公司只做原装可	询价
深圳市河锋鑫科技有限公司	IS67WVC4M16ALL7010BLA1	ISSI Integrated Silicon Soluti	22+	54VFBGA (6x8)	9000	原厂渠道,现货配单	询价
深圳市鹏和科技有限公司	IS67WVE416BLL-70BLAI	ISSI	24+	BGA	5000	全现原装公司现货	询价

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IS67规格书下载地址

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IS67数据表相关新闻

IS63WV1024BLL-12TLI
IS63WV1024BLL-12TLI, TSOP, ISSI, 22+
2023-3-9
IS64LV51216-12TLA3
进口代理
2022-8-15
IS82C55AZ 原装现货
IS82C55AZ 可做含税，支持实单
2021-9-22
IS63LV1024L-12JL进口原装深圳现货
进口原装，国产代理，海量库存，产品齐全，货源渠道百分百正品
2020-6-19
IS916EN
IS916EN 深圳市拓亿芯电子有限公司，本公司具备一般纳税人，可开16点增值税票，货源渠道保证原厂原装正品IC，诚信为本，薄利多销。
2019-3-6
IS9-1715ARH-8-抗辐射互补开关FET驱动器
抗辐射互补开关FET驱动器辐射硬化的IS -1715ARH是一种高速，高当前互补功率FET设计中使用的驱动程序同步整流电路。软开关转换两个输出波形可通过设置管理独立的可编程延迟。延迟引脚可以通过配置零电压传感，让精确的开关控制。的IS -1715ARH有一个输入，这是PWM和TTL兼容，并能运行频率高达1MHz。该辅助输出开关立即在上升沿输入，但之前等待响应延迟为T2的下降沿。一个逻辑低使能引脚（ENBL）的地方俱进低有效输出模式，并根据电压的锁定（UVLO）功能功能设定在9伏（最大）。与Intersil的人工介质隔离抗辐射硅栅（体操）过程中，这些设备是免疫单粒子闭锁（SEL
2013-3-1

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IS67产品属性

IS67供应商更多...

IS67芯片相关品牌

IS67规格书下载地址

IS67参数引脚图相关

IS67数据表相关新闻

IS63WV1024BLL-12TLI

IS64LV51216-12TLA3

IS82C55AZ 原装现货

IS63LV1024L-12JL进口原装深圳现货

IS916EN

IS9-1715ARH-8-抗辐射互补开关FET驱动器

DdatasheetPDF页码索引