型号 功能描述 生产厂家 企业 LOGO 操作

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

ISSI

矽成半导体

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

ISSI

矽成半导体

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

ISSI

矽成半导体

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

ISSI

矽成半导体

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

ISSI

矽成半导体

更新时间:2025-12-13 10:44:01
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