65,536-bit/32,768-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C64-2 is a 1.8V (1.8V-5.5V) 64K-bit (8192 x 8) Electrically Erasable PROM, IS24C64-3 is a 2.5V (2.5V-5.5V) 64K-bit (8192 x 8) Electrically Erasable PROM, IS24C32-2 is a 1.8V (1.8V-5.5V) 32K-bit (4096 x 8) Electrically Erasable PROM and the IS24C32-3 is a 2.5V (2.5V-5.5V) 32K-b

65,536-bit/32,768-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C64-2 is a 1.8V (1.8V-5.5V) 64K-bit (8192 x 8) Electrically Erasable PROM, IS24C64-3 is a 2.5V (2.5V-5.5V) 64K-bit (8192 x 8) Electrically Erasable PROM, IS24C32-2 is a 1.8V (1.8V-5.5V) 32K-bit (4096 x 8) Electrically Erasable PROM and the IS24C32-3 is a 2.5V (2.5V-5.5V) 32K-b

65,536-bit/32,768-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C64-2 is a 1.8V (1.8V-5.5V) 64K-bit (8192 x 8) Electrically Erasable PROM, IS24C64-3 is a 2.5V (2.5V-5.5V) 64K-bit (8192 x 8) Electrically Erasable PROM, IS24C32-2 is a 1.8V (1.8V-5.5V) 32K-bit (4096 x 8) Electrically Erasable PROM and the IS24C32-3 is a 2.5V (2.5V-5.5V) 32K-b

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

64K-bit/32K-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C32A/B and IS24C64A/B are electrically erasable PROM devices that use the standard 2-wire interface for communications. The IS24C32A/B and IS24C64A/B contain a memory array of 32K bits (4K x 8) and 64K-bits (8K x 8), respectively. Each device is organized into 32 byte pages fo

65/536-bit/32/768-bit 2-WIRE SERIAL CMOS EEPROM

64/32 Kbit Serial I짼C Bus EEPROM

Description The M24C32, M24C64 and M24128 devices are I2C-compatible electrically erasable programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock

64/32 Kbit Serial I짼C Bus EEPROM

Description The M24C32, M24C64 and M24128 devices are I2C-compatible electrically erasable programmable memories (EEPROM). They are organized as 4096 × 8 bits, 8192 × 8 bits and 16384 × 8 bits, respectively. I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus

64 Kbit 8192 x 8 bit Serial CMOS EEPROMs, I2C Synchronous 2-Wire Bus

Features • Data EEPROM internally organized as 8192 bytes and 256 pages × 32 bytes • Page Protection Mode for protecting the EEPROM against unintended data changes (SLx 24C64.../P types only) • Low power CMOS • VCC = 2.7 to 5.5 V operation • Two wire serial interface bus, I2C-Bus