OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS

The IN74HC652 is identical in pinout to the LS/ALS652. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These devices consists of bus transceiver circuits, D-type flip-flop, and control circuitry arranged for multiplex

Octal 3-State Bus Transceivers and D Flip-Flops High-Performance Silicon-Gate CMOS

The IN74HC651A is identical in pinout to the LS/ALS651. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These devices consist of bus transceiver circuits, D-type flip-flop, and control circuitry arranged for multiplex

Octal 3-State Bus Transceivers and D Flip-Flops High-Performance Silicon-Gate CMOS

The IN74HC652A is identical in pinout to the LS/ALS652. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These devices consist of bus transceiver circuits, D-type flip-flop, and control circuitry arranged for multiplex

Octal 3-State Bus Transceivers and D Flip-Flops High-Performance Silicon-Gate CMOS

The IN74HC651A is identical in pinout to the LS/ALS651. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These devices consist of bus transceiver circuits, D-type flip-flop, and control circuitry arranged for multiplex

Octal 3-State Bus Transceivers and D Flip-Flops High-Performance Silicon-Gate CMOS

The IN74HC652A is identical in pinout to the LS/ALS652. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These devices consist of bus transceiver circuits, D-type flip-flop, and control circuitry arranged for multiplex

Octal Bus Transceivers/Registers(with inverted 3-state outputs)

Description This device consists of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Enable GAB and GBA are provided to cotrol the transceiver functions. Select AB an