Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS

Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The IN74HC10A is identical in pinout to the LS/ALS10. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Outputs Directly Interface to CMOS, NMOS, and TTL • Ope

High Noise Immunity Characteristic of CMOS Devices

Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The IN74HC10A is identical in pinout to the LS/ALS10. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Outputs Directly Interface to CMOS, NMOS, and TTL • Ope

High Noise Immunity Characteristic of CMOS Devices

Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS

Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The IN74HC10A is identical in pinout to the LS/ALS10. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Outputs Directly Interface to CMOS, NMOS, and TTL • Ope

Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS

Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The IN74HC10A is identical in pinout to the LS/ALS10. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Outputs Directly Interface to CMOS, NMOS, and TTL • Ope

Triple 3-Input NAND Gate

Triple 3-input NAND gate

1. General description The 74HC10; 74HCT10 is a triple 3-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Complies with JEDEC standard JESD7A • Input levels: • For74HC10

Triple 3-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. FEATURES • Output capability: standard • ICC categ

Triple 3-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. FEATURES • Output capability: standard • ICC categ

Triple 3-input NAND gate

1. General description The 74HC10; 74HCT10 is a triple 3-input NAND gate. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits • Complies with JEDEC standard JESD7A • Input levels: • For74HC10

Triple 3-input NAND gate

GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. FEATURES • Output capability: standard • ICC categ