Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS

The IN74AC573 is identical in pinout to the LS/ALS573, HC/HCT573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is

Octal 3-State Noninverting Transparent Latch

The IN74AC573 is identical in pinout to the LS/ALS573, HC/HCT573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is

Octal 3-State Noninverting Transparent Latch

Octal 3-State Noninverting Transparent Latch

The IN74AC573 is identical in pinout to the LS/ALS573, HC/HCT573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is

Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS

The IN74AC573 is identical in pinout to the LS/ALS573, HC/HCT573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is

Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS

The IN74AC573 is identical in pinout to the LS/ALS573, HC/HCT573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is

Octal 3-State Noninverting Transparent Latch

The IN74AC573 is identical in pinout to the LS/ALS573, HC/HCT573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is

Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS

OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING

DESCRIPTION The 74AC573 is an advanced high-speed CMOS OCTAL D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. ■ HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C

Advanced CMOS

Features:  Outputs Source/Sink 24mA  Low input current: 1μA  3-State outputs  Outputs directly interface CMOS, NMOS and TTL  Operating voltage range: 2.0V to 6.0V  Lower power consumption & higher speed  Function compatible with 74HC573  Full military temperature range.

Octal Latch with 3-STATE Outputs

General Description The 74AC573 and 74ACT573 are high-speed octal latches with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. The 74AC573 and 74ACT573 are functionally identical to the 74AC373 and 74ACT373 but with inputs and out puts on opposite sides. Feature

Advanced CMOS Logic

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Octal Latch with 3-STATE Outputs

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