Low-EMI Clock Generator for Intel Mobile 133-MHz/3 SO-DIMM Chipset Systems

Features • Meets Intel’s Mobile 133.3MHz Chipset • Three CPU Clocks (66.6/100/133.3 MHz, 2.5V) • Six SDRAM Clocks, 1-DCLK (100/133.3 MHz, 3.3V) • Seven PCI Clocks (33MHz, 3.3V), one free running • Two IOAPIC clocks, synchronous to CPU clock (33.3 MHz, 2.5V) • One REF Clock • Two 48-MHz fix

Low-EMI Clock Generator for Intel Mobile 133-MHz/3 SO-DIMM Chipset Systems

Features • Meets Intel’s Mobile 133.3MHz Chipset • Three CPU Clocks (66.6/100/133.3 MHz, 2.5V) • Six SDRAM Clocks, 1-DCLK (100/133.3 MHz, 3.3V) • Seven PCI Clocks (33MHz, 3.3V), one free running • Two IOAPIC clocks, synchronous to CPU clock (33.3 MHz, 2.5V) • One REF Clock • Two 48-MHz fix

Low-EMI Clock Generator for Intel Mobile 133-MHz/3 SO-DIMM Chipset Systems

Features • Meets Intel’s Mobile 133.3MHz Chipset • Three CPU Clocks (66.6/100/133.3 MHz, 2.5V) • Six SDRAM Clocks, 1-DCLK (100/133.3 MHz, 3.3V) • Seven PCI Clocks (33MHz, 3.3V), one free running • Two IOAPIC clocks, synchronous to CPU clock (33.3 MHz, 2.5V) • One REF Clock • Two 48-MHz fix

Low-EMI Clock Generator for Intel Mobile 133-MHz/3 SO-DIMM Chipset Systems

Features • Meets Intel’s Mobile 133.3MHz Chipset • Three CPU Clocks (66.6/100/133.3 MHz, 2.5V) • Six SDRAM Clocks, 1-DCLK (100/133.3 MHz, 3.3V) • Seven PCI Clocks (33MHz, 3.3V), one free running • Two IOAPIC clocks, synchronous to CPU clock (33.3 MHz, 2.5V) • One REF Clock • Two 48-MHz fix

Low-EMI Clock Generator for Intel Mobile 133-MHz/3 SO-DIMM Chipset Systems

Features • Meets Intel’s Mobile 133.3MHz Chipset • Three CPU Clocks (66.6/100/133.3 MHz, 2.5V) • Six SDRAM Clocks, 1-DCLK (100/133.3 MHz, 3.3V) • Seven PCI Clocks (33MHz, 3.3V), one free running • Two IOAPIC clocks, synchronous to CPU clock (33.3 MHz, 2.5V) • One REF Clock • Two 48-MHz fix

50 MHz CMOS Complete DDS

GENERAL DESCRIPTION The AD9835 is a numerically-controlled oscillator employing a phase accumulator, a COS lookup table, and a 10-bit digital-to-analog converter integrated on a single CMOS chip. Modulation capabilities are provided for phase modulation and frequency modulation. Clock rates of u

50 MHz CMOS Complete DDS

GENERAL DESCRIPTION The AD9835 is a numerically-controlled oscillator employing a phase accumulator, a COS lookup table, and a 10-bit digital-to-analog converter integrated on a single CMOS chip. Modulation capabilities are provided for phase modulation and frequency modulation. Clock rates of u

PCI Dual UART and 1284 Printer Port

文件：135.82 Kbytes Page：23 Pages

PCI Dual UART and 1284 Printer Port

文件：135.82 Kbytes Page：23 Pages