3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD

DESCRIPTION The LVCH16374A 16-bit edge-triggered D-type register is built using advanced dual metal CMOS technology. This high-speed, low-power register is ideal for use as a buffer register for data synchronization and storage. The Output Enable (OE) and clock (CLK) controls are organized to ope

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

1. General description The 74LVC16374A; 74LVCH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bi

16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16374A is a 16-bit edge-triggered flip-flop featuringseparate D-type inputs for each flip-flop and 3-State outputs for bus oriented applications. The 74LVC16374A consists of 2 sections of eight positive edge-triggered flip-flops. A clock (CP) input and an output enable (OE

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

16-bit edge-triggered D-type flip-flop with 5 V tolerant inputs/outputs; 3-state

16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC(H)16374A is a 16-bit edge-triggered flip-flop featuringseparate D-type inputs for each flip-flop and 3-State outputs for bus oriented applications. The 74LVC16374A consists of 2 sections of eight positive edge-triggered flip-flops. A clock (CP) input and an output enable (OE