型号 功能描述 生产厂家&企业 LOGO 操作

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)

DESCRIPTION: The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz – f2Q Max. spec (FREQ_SEL = HIGH) • Max. output frequency: 150MHz • Pin and function compatible with FCT88915T, MC88915T • 5 non-inverting outputs, one inverting output, one 2x output, one ÷2 output; all outputs are TTL-c

RENESAS

瑞萨

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

文件:1.14603 Mbytes Page:10 Pages

IDT

IDT74FCT3889产品属性

  • 类型

    描述

  • 型号

    IDT74FCT3889

  • 制造商

    Integrated Device Technology Inc

  • 功能描述

    EIGHT DISTRIBUTED-OUTPUT CLOCK DRIVER, 28 Pin, Plastic, SSOP

更新时间:2025-8-16 17:30:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
IDT
0850+
SSOP28
27
原装现货支持BOM配单服务
23+
原厂封装
9888
专做原装正品,假一罚百!
IDT
24+
SSOP
47
IDT
2000
500
公司优势库存 热卖中!!
IDT
23+
SSOP28
5000
原装正品,假一罚十
IDT
02+
SSOP
495
一级代理,专注军工、汽车、医疗、工业、新能源、电力
IDT
24+
PLCC
80000
只做自己库存 全新原装进口正品假一赔百 可开13%增
IDT
24+
SSOP28
9600
原装现货,优势供应,支持实单!
IDT
23+
SSOP28
6500
专注配单,只做原装进口现货
IDT
2447
SSOP28
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货

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