32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Description The IDT71V432 is a 3.3V high-speed 1,048,576-bit CacheRAM organized as 32K x 32 with full support of the Pentium™ and PowerPC™ processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The IDT71V432

32K x 32 CacheRAM™ 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Features ◆ 32K x 32 memory configuration ◆ Supports high-performance system speed: Commercial and Industrial: — 5ns Clock-to-Data Access (100MHz) — 6ns Clock-to-Data Access (83MHz) ◆ Single-cycle deselect functionality (Compatible with Micron Part # MT58LC32K32D7LG-XX)

32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Description The IDT71V432 is a 3.3V high-speed 1,048,576-bit CacheRAM organized as 32K x 32 with full support of the Pentium™ and PowerPC™ processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The IDT71V432

32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Description The IDT71V432 is a 3.3V high-speed 1,048,576-bit CacheRAM organized as 32K x 32 with full support of the Pentium™ and PowerPC™ processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The IDT71V432

32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Description The IDT71V432 is a 3.3V high-speed 1,048,576-bit CacheRAM organized as 32K x 32 with full support of the Pentium™ and PowerPC™ processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The IDT71V432

32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Description The IDT71V432 is a 3.3V high-speed 1,048,576-bit CacheRAM organized as 32K x 32 with full support of the Pentium™ and PowerPC™ processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The IDT71V432

32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Description The IDT71V432 is a 3.3V high-speed 1,048,576-bit CacheRAM organized as 32K x 32 with full support of the Pentium™ and PowerPC™ processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The IDT71V432

32K x 32 CacheRAM 3.3V Synchronous SRAM Burst Counter Single Cycle Deselect

Description The IDT71V432 is a 3.3V high-speed 1,048,576-bit CacheRAM organized as 32K x 32 with full support of the Pentium™ and PowerPC™ processor interfaces. The pipelined burst architecture provides costeffective 3-1-1-1 secondary cache performance for processors up to 100 MHz. The IDT71V432

封装/外壳：100-LQFP 包装：卷带（TR） 描述：IC SRAM 1MBIT PARALLEL 100TQFP 集成电路（IC） 存储器

封装/外壳：100-LQFP 包装：卷带（TR） 描述：IC SRAM 1MBIT PARALLEL 100TQFP 集成电路（IC） 存储器