128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs

Description The IDT71V3557/59 are 3.3V high-speed 4,718,592-bit (4.5 Mega-bit) synchronous SRAMs organized as 128K x 36/256K x 18. They are designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus they have been given the name ZBTTM, or

封装/外壳：100-LQFP 包装：托盘 描述：IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路（IC） 存储器

封装/外壳：100-LQFP 包装：托盘 描述：IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路（IC） 存储器

128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs

Description The IDT71V3557/59 are 3.3V high-speed 4,718,592-bit (4.5 Mega-bit) synchronous SRAMs organized as 128K x 36/256K x 18. They are designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus they have been given the name ZBTTM, or

128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs

Description The IDT71V3557/59 are 3.3V high-speed 4,718,592-bit (4.5 Mega-bit) synchronous SRAMs organized as 128K x 36/256K x 18. They are designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus they have been given the name ZBTTM, or

128K x 36, 256K x 18, 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter, Flow-Through Outputs

Description The IDT71V3557/59 are 3.3V high-speed 4,718,592-bit (4.5 Mega-bit) synchronous SRAMs organized as 128K x 36/256K x 18. They are designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus they have been given the name ZBTTM, or

Synchronous ZBT SRAMs

文件：298.78 Kbytes Page：28 Pages

Synchronous ZBT SRAMs

文件：298.78 Kbytes Page：28 Pages