3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Description The IDT71V124 is a 1,048,576-bit high-speed static RAM organized as 128K x 8. It is fabricated using IDT’s high-performance, high-reliability CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for

封装/外壳：32-BSOJ（0.300"，7.62mm 宽） 包装：管件 描述：IC SRAM 1MBIT PARALLEL 32SOJ 集成电路（IC） 存储器

封装/外壳：32-BSOJ（0.300"，7.62mm 宽） 包装：管件 描述：IC SRAM 1MBIT PARALLEL 32SOJ 集成电路（IC） 存储器

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible