位置：首页 > IC中文资料第6531页 > IDT2309A
| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
IDT2309A | 3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT |   | |
IDT2309A | 3.3V ZERO DELAY CLOCK BUFFER FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five and one bank of four outputs • Separate output enable for each output bank • Output Skew | RENESAS 瑞萨 | | |
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
3.3V ZERO DELAY CLOCK BUFFER DESCRIPTION: The IDT2309A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2309A | IDT | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC CLK BUFFER ZD STD DRV 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器 | ETC 知名厂家 | ETC | | |
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC CLK BUFFER ZD STD DRV 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器 | ETC 知名厂家 | ETC | | |
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IDT2309A产品属性
- 类型
描述
- 型号
IDT2309A
- 制造商
IDT
- 制造商全称
Integrated Device Technology
- 功能描述
3.3V ZERO DELAY CLOCK BUFFER
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
IDT |
24+ |
SOP |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
|||
IDT |
22+ |
16TSSOP |
9000 |
原厂渠道,现货配单 |
|||
IDT |
TSSOP16 |
2874 |
一级代理 原装正品假一罚十价格优势长期供货 |
||||
IDT |
23+ |
TSSOP16 |
32732 |
原装正品代理渠道价格优势 |
|||
IDT |
23+ |
65480 |
|||||
IDT |
22+ |
SOP |
5000 |
全新原装现货!自家库存! |
|||
IDT |
24+ |
SOP16 |
4000 |
原装原厂代理 可免费送样品 |
|||
IDT |
1950+ |
TSSOP16 |
4856 |
只做原装正品现货!或订货假一赔十! |
|||
IDT |
23+ |
SOP16 |
28000 |
原装正品 |
|||
IDT |
25+ |
NA |
880000 |
明嘉莱只做原装正品现货 |
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IDT2309A规格书下载地址
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DdatasheetPDF页码索引
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