31/2 Digit, LCD/LED Display, A/D Converter with Display Hold

Description The Intersil ICL7116 and ICL7117 are high performance, low power, 31/2 digit, A/D converters. Included are seven segment decoders, display drivers, a reference, and a clock. The ICL7116 is designed to interface with a liquid crystal display (LCD) and includes a multiplexed backplane d

3쩍 Digit A/D Converter With Display Hold

General Description The Maxim ICL7116 and ICL7117 are 3½ digit monolithic analog-to-digital converters. They differ from the Maxim ICL7106 and ICL7107 in that the ICL7116 and ICL7117 have a Hold pin, which makes it possible to hold or “freeze” a reading. These integrating ADCs have very high inpu

Data Acquisition

Data Acquisition

3쩍 Digit ADCs with Display Hold

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封装/外壳：40-DIP（0.600"，15.24mm） 包装：管件 描述：IC DISPLAY DRIVR 3.5DIGIT 40DIP 集成电路（IC） ADC/DAC - 特殊用途

封装/外壳：40-DIP（0.600"，15.24mm） 包装：卷带（TR） 描述：IC DISPLAY DRIVR 3.5DIGIT 40DIP 集成电路（IC） ADC/DAC - 特殊用途

SUPER LOW OPERATING CURRENT AND LOW OFFSET VOLTAGE TINY SINGLE C-MOS COMPARATOR

■ GENERAL DESCRIPTION The NJU7116 is a super low operating current and low offset voltage tiny single C-MOS comparator with C-MOS output. The operating current is 1µA ( typ ), and the operating of 1.8V to 3.6V. The input offset voltage is lower than 2.5mV ( max ). Furthermore, the NJU7116 is

SUPER LOW OPERATING CURRENT AND LOW OFFSET VOLTAGE TINY SINGLE C-MOS COMPARATOR

■ GENERAL DESCRIPTION The NJU7116 is a super low operating current and low offset voltage tiny single C-MOS comparator with C-MOS output. The operating current is 1µA ( typ ), and the operating of 1.8V to 3.6V. The input offset voltage is lower than 2.5mV ( max ). Furthermore, the NJU7116 is

Integrated Circuit Phase Lock Loop (PLL) Stereo Decoder (BTSC System)

Description: The NTE7116 is a phase lock loop (PLL) stereo decoder in a 20–Lead DIP type package designed primarily for low cost stereo decoding in a low–to–medium–line TV. The MUX input (Pin1) is a low impedance current input, the gain of the input amplifier is therefore determined by the extern

3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS WITH HOLD

文件：218.68 Kbytes Page：14 Pages

3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS WITH HOLD

文件：218.68 Kbytes Page：14 Pages