Description

The HD74HCT240 is an inverting buffer and has two active low enables (1G and 2G). Each enable

independently controls 4 buffers. This device does not have schmitt trigger inputs.

Features

• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility

• High Speed Operation: tpd (A to Y) = 11 ns typ (CL = 50 pF)

• High Output Current: Fanout of 15 LSTTL Loads

• Wide Operating Voltage: VCC = 4.5 to 5.5 V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)