Description

The HD66724/HD66725, dot-matrix graphics LCD controller and driver LSI incorporating a key scan function up to a 4-by-8 key matrix, display characters such as alphanumerics, katakana, hiragana and symbols as well as graphics such as kanji and pictograms. They can be configured to drive a dot-matrix liquid crystal display and control key scan functions under the control of the microprocessor connected via the clock-synchronized serial or 4/8-bit bus.

Features

• Control and drive of a character and graphics LCD with built-in key scan functions

• Three 12- (16-) character lines, 72 (96) -by-24 dot graphics, and 144 (192) segments

• 48 (64) grayscale segments

• Control up to a 4 × 8 (32 key) matrix key scan.

• 3 general ports built-in

• Low-power operation support:

- Vcc = 1.8 to 5.5 V (low voltage)

- VLCD = 3.0 to 6.5 V (liquid crystal drive voltage)

- Single, double or triple booster for liquid crystal drive voltage

- Contrast adjuster and voltage followers to decrease direct current flow in the LCD drive bleederresistors

- Wake-up feature using key scan interrupt

- Programmable drive duty ratios and bias values displayed on LCD

• Clock-synchronized serial interface

• 4-/8-bit bus interface capability (except when key scan circuit is used)

• 80 × 8-bit display data RAM (80 characters max)

• 20,736-bit (6 × 8 dots : 432 characters) character generator ROM

• 384 × 8-bit (64 characters) character generator RAM

• 96 × 2-bit (192 segment-icons and marks max) segment RAM

• 72- (96-) segment × 26-common-signal liquid crystal display driver

• Programmable display sizes and duty ratios

• Vertical and horizontal smooth scrolls

• Vertical double-height display

• Selectable CGROM memory bank (max. 432 fonts)

• Wide range of instruction functions:

- Clear display, display on/off control, icon and mark control, character blink, black-white reversed blinking cursor, return home, cursor on/off, black-white reversed raster-row

• No wait time for instruction execution and RAM access (zero instruction)

• Internal oscillation (with external or built-in resistor) hardware reset

• Shift change of segment and common driver

• Slim chip with bumps for chip-on-glass (COG) mounting, and tape carrier package (TCP)