BCD to 7-segment latch/decoder/driver

DESCRIPTION The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (DA to DD), an active LOW latch enable input (EL), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH n-p-n bipolar transistor segment outputs (Oa to Og).

BCD to 7-segment latch/decoder/driver

BCD to 7-segment latch/decoder/driver

DESCRIPTION The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (DA to DD), an active LOW latch enable input (EL), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH n-p-n bipolar transistor segment outputs (Oa to Og).

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC DRVR 7 SEGMENT 16SO 集成电路（IC） 显示驱动器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC DRVR 7 SEGMENT 16SO 集成电路（IC） 显示驱动器

BCD to 7-segment latch/decoder/driver

DESCRIPTION The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (DA to DD), an active LOW latch enable input (EL), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH n-p-n bipolar transistor segment outputs (Oa to Og).

BCD to 7-segment latch/decoder/driver

DESCRIPTION The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (DA to DD), an active LOW latch enable input (EL), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH n-p-n bipolar transistor segment outputs (Oa to Og).

BCD to 7-segment latch/decoder/driver

DESCRIPTION The HEF4511B is a BCD to 7-segment latch/decoder/driver with four address inputs (DA to DD), an active LOW latch enable input (EL), an active LOW ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH n-p-n bipolar transistor segment outputs (Oa to Og).

BCD to 7-segment latch/decoder/driver

GENERAL DESCRIPTION The 74HC/HCT4511 are high-speed Si-gate CMOS devices and are pin compatible with “4511” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Latch storage of BCD inputs • Blanking input • Lamp test input • Driving common cathode L