Quadruple 2-input NAND Schmitt trigger

DESCRIPTION The HEF4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage (VP) and the n

Quad 2-input NAND Schmitt trigger

1. General description The HEF4093B is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. Schmitt trigger inputs transform slowly changing input signals into shar

Quad 2-input NAND Schmitt trigger

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FBQuad 2-input NAND Schmitt trigger

封装/外壳：14-DIP（0.300"，7.62mm） 包装：管件 描述：IC GATE NAND 4CH 2IN 14DIP 集成电路（IC） 门和反相器

Appliance Outlet F-Horizontal, Snap-in Mounting, Front Side, Solder or Quick-connect Terminal

Description - Panel Mount: Snap-in version, from front side - Connector, Pin temperature 70 °C, protection class I or II - Solder terminals or quick connect terminals

Quadruple 2-input NAND Schmitt trigger

DESCRIPTION The HEF4093B consists of four Schmitt-trigger circuits. Each circuit functions as a two-input NAND gate with Schmitt-trigger action on both inputs. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage (VP) and the n

Quad 2-input NAND Schmitt trigger

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

Quad 2-input NAND Schmitt trigger

Description BU4001B series ICs are 2-input positive logic NOR gates, each with four built-in circuits. A buffer achieved by an inverter added at the gate output improves the input / output propagation characteristics and minimizes variation in the propagation time caused by an increase in the loa

High Voltage CMOS Logic ICs >Gate>

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Quad 2-Input NAND Schmitt Trigger

Quad 2-Input NAND Schmitt Trigger

Quad 2-Input NAND Schmitt Trigger

Quad 2-Input NAND Schmitt Trigger

CMOS QUAD 2-INPUT NAND SCHMITT TRIGGERS

CMOS QUAD 2-INPUT NAND SCHMITT TRIGGERS

Quad 2-Input NAND Schmitt Trigger

Quadruple 2-input NAND Schmitt Trigger

Quadruple 2-input NAND Schmitt trigger

Quad 2-Input NAND Schmitt Trigger

Quad 2−Input NAND Schmitt Trigger

Quad 2-Input NAND Schmitt Trigger

QUAD 2 INPUT NAND SCHMITT TRIGGER

Quad 2−Input NAND Schmitt Trigger

Quad 2-Input NAND Schmitt Trigger

QUAD 2-INPUT NAND SCHMITT TRIGGERS

Quad 2-Input NAND Schmitt Triggers