Quadruple 2-input OR gate

DESCRIPTION The HEF4071B is a positive logic quadruple 2-input OR gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity of output impedance.

Quad 2-input OR gate

Quad 2-input OR gate

1. General description The HEF4071B is a quad 2-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. 2. Features and benefits • Fully static operation • 5 V, 10 V, and 15 V parametric ratings • CMOS l

Quad 2-input OR gate

The HEF4071B is a quad 2-input OR gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations.\n It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to • Fully static operation\n• 5 V, 10 V, and 15 V parametric ratings\n• Standardized symmetrical output characteristics\n• Inputs and outputs are protected against electrostatic effects\n• Specified from -40 °C to +85 °C and -40 °C to +125 °C\n• Complies with JEDEC standard JESD 13-B;

Quad 2-input OR gate

The HEF4071B-Q100 is a quad 2-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD.\n This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Fully static operation\n• 5 V, 10 V, and 15 V parametric ratings\n• CMOS low power dissipation\n• High noise immunity\n• Standardized symmetrical output character;

Quad 2-input OR gate

1. General description The HEF4071B-Q100 is a quad 2-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE OR 4CH 2-INP 14SO 集成电路（IC） 门和反相器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC GATE OR 4CH 2-INP 14SO 集成电路（IC） 门和反相器

LOW NOISE J-FET INPUT OPERATIONAL AMPLIFIER????

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Quad 2-Input OR, AND Buffered B Series Gate

文件：182.47 Kbytes Page：8 Pages

Quad 2-Input OR, AND Buffered B Series Gate

文件：182.47 Kbytes Page：8 Pages

Quad 2-Input OR, AND Buffered B Series Gate

文件：182.47 Kbytes Page：8 Pages

Quad 2-Input OR, AND Buffered B Series Gate

文件：182.47 Kbytes Page：8 Pages