Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

Dual 4-bit static shift register

1. General description The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (nD), a clock input (nCP), four fully buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input (nMR)

Dual 4-bit static shift register

The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input (MR). Information present on D is s • Tolerant of slow clock rise and fall times\n• Fully static operation\n• 5 V, 10 V, and 15 V parametric ratings\n• Standardized symmetrical output characteristics\n• Specified from -40 °C to +85 °C.\n• Complies with JEDEC standard JESD 13-B;

Tolerant of slow clock rise and fall times

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：串行至并行 包装：管件 描述：IC REGISTER STATIC 4BIT 16-SOIC 集成电路（IC） 移位寄存器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：串行至并行 包装：管件 描述：IC STATIC SHIFT REG 4BIT 16SOIC 集成电路（IC） 移位寄存器

Tolerant of slow clock rise and fall times

Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

DUAL 4-STAGE STATIC SHIFT REGISTER WITH SERIAL INPUT/PARALLEL OUTPUT

DESCRIPTION The HCC4015B (extended temperature range) and HCF4015B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micropackage. ■ MEDIUM SPEED OPERATION : 12MHz (typ.) CLOCK RATE AT VDD - VSS = 10V ■

SWITCHMODE??Power Rectifier

文件：68.95 Kbytes Page：4 Pages

SWITCHMODE??Power Rectifier

文件：68.95 Kbytes Page：4 Pages