Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

DUAL 4-STAGE STATIC SHIFT REGISTER WITH SERIAL INPUT/PARALLEL OUTPUT

DESCRIPTION The HCC4015B (extended temperature range) and HCF4015B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micropackage. ■ MEDIUM SPEED OPERATION : 12MHz (typ.) CLOCK RATE AT VDD - VSS = 10V ■

SWITCHMODE??Power Rectifier

文件：68.95 Kbytes Page：4 Pages

SWITCHMODE??Power Rectifier

文件：68.95 Kbytes Page：4 Pages