OctalD-typeFlipFlopswith3-stateOutputs

Description TheHD74LVC374AhaseightedgetriggerDtypeflipflopswiththreestateoutputsina20pinpackage.DataattheDinputsmeetingsetuprequirementsaretransferredtotheQoutputsonpositivegoingtransitionsoftheclockinput.Whentheclockinputgoeslow,dataattheDinpu

OctalD-typeflip-flopwith5-volttolerantinputs/outputs;positiveedge-trigger3-State

DESCRIPTION The74LVC374Aisahigh-performance,low-power,low-voltage,Si-gateCMOSdevice,superiortomostadvancedCMOScompatibleTTLfamilies. Inputscanbedrivenfromeither3.3Vor5Vdevices.In3-Stateoperation,outputscanhandle5V.Thisfeatureallowstheuseofthesedevicesas

Low-VoltageCMOSOctalBuffer

Low-VoltageCMOSOctalD-TypeFlip-Flop With5V−TolerantInputsandOutputs(3−State,Non−Inverting) The74LVC374Aisahighperformance,non−invertingoctalD−typeflip−flopoperatingfroma1.2to3.6Vsupply.HighimpedanceTTLcompatibleinputssignificantlyreducecurrentloadingtoinput

OCTALD-TYPEFLIP-FLOPHIGHPERFORMANCE

DESCRIPTION The74LVC374Aisanadvancedhigh-speedCMOSOCTALD-TYPEFLIPFLOPwith3STATEOUTPUTSNONINVERTINGfabricatedwithsub-micronsilicongateanddouble-layermetalwiringC2MOStechnology. These8bitD-Typelatcharecontrolledbyaclockinput(CK)andanoutputenableinput(OE)

OctalD-typeflip-flop;5Vtolerantinputs/outputs;positive-edgetrigger;3-state

1.Generaldescription The74LVC374Aisanoctalpositive-edgetriggeredD-typeflip-flopwith3-stateoutputs.The devicefeaturesaclock(CP)andoutputenable(OE)inputs.Theflip-flopswillstorethestateof theirindividualD-inputsthatmeettheset-upandholdtimerequirementsonthe

Low-VoltageCMOSOctalD-TypeFlip-Flop

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