Quad. 2-to-1-line Data Selectors/Multiplexers (with 3-state outputs)

Description The large output drive capability coupled with the 3-state feature make this device ideal for interfacing with bus lines in a bus organized system. When the output control input line is taken high, the outputs of all four multiplexers are sent into a high impedance state. When the out

Quad 2-input multiplexer; 3-state; inverting

Quad 2-input multiplexer; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT258 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT258 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of d

Quad 2-input multiplexer; 3-state; inverting

Quad 2-input multiplexer; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT258 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT258 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of d

Quad 2-input multiplexer; 3-state; inverting

GENERAL DESCRIPTION The 74HC/HCT258 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT258 have four identical 2-input multiplexers with 3-state outputs, which select 4 bits of d