型号 功能描述 生产厂家 企业 LOGO 操作
HD74HC107FP

General-Purpose Logics-HD/RD74HC Series

RENESAS

瑞萨

Dual J-K Flip-Flops (with Clear)

Description This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Each one has independent J, K, clock, and clear inputs and Q and Q outputs. Clear is independent of the clock and accomplished by a low level on the input. Featur

RENESAS

瑞萨

Dual J-K Flip-Flops (with Clear)

文件:127.36 Kbytes Page:10 Pages

RENESAS

瑞萨

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飞利浦

Dual JK flip-flop with reset; negative-edge trigger

1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J

NEXPERIA

安世

Dual JK flip-flop with reset; negative-edge trigger

1. General description The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J

NEXPERIA

安世

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飞利浦

Dual JK flip-flop with reset; negative-edge trigger

GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, cloc

Philips

飞利浦

HD74HC107FP产品属性

  • 类型

    描述

  • 型号

    HD74HC107FP

  • 制造商

    Renesas Electronics

  • 功能描述

    74HC Dual J-K Flip-Flop with Clear

更新时间:2026-1-4 23:01:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
HITACHI/日立
24+
NA/
1647
优势代理渠道,原装正品,可全系列订货开增值税票
HITACHI/日立
24+
SOP16
990000
明嘉莱只做原装正品现货
HIT
94+
SOP16
2145
全新原装进口自己库存优势
HIT
24+
DIP
5000
原装进口现货假一赔十
RENESAS
原厂封装
9800
原装进口公司现货假一赔百
HIT
24+
SOP5.2MM
1331
只做原装正品现货 欢迎来电查询15919825718
HIT
23+
SOP
7000
绝对全新原装!100%保质量特价!请放心订购!
RENESAS
25+23+
New
34686
绝对原装正品现货,全新深圳原装进口现货
RENESAS/瑞萨
2450+
SOP
6540
只做原装正品假一赔十为客户做到零风险!!
RENESAS
22+
SOP-0.52
8000
原装正品支持实单

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