128-bit Static Shift Register

128-bit Static Shift Register The HD14562B is a 128-bit static shift register. Data is clocked in and out of the shift register on teh positive edge of the clock input. Data outputs are available every 16 bits, from 16 through bit 128.

128-bit Static Shift Register

128-Bit Static Shift Register

The MC14562B is a 128–bit static shift register constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Data is clocked in and out of the shift register on the positive edge of the clock input. Data outputs are available every 16 bits, from 16 throug

128-Bit Static Shift Register

The MC14562B is a 128–bit static shift register constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Data is clocked in and out of the shift register on the positive edge of the clock input. Data outputs are available every 16 bits, from 16 throug

128-Bit Static Shift Register

The MC14562B is a 128–bit static shift register constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Data is clocked in and out of the shift register on the positive edge of the clock input. Data outputs are available every 16 bits, from 16 throug

128-BIT STATIC SHIFT REGISTER

TheMC14562B is a 128–bit static shift register constructed with MOS P–channeland N–channel enhancement mode devices in a single monolithicstructure. Data is clockedin and out of the shift register on the positiveedge of the clock input. Data outputs are availableevery 16 bits, from 16 through bit