丝印代码：HC4094M；CDx4HC4094, CD74HCT4094 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

1 Features • Buffered inputs • Separate serial outputs synchronous to both positive and negative clock edges for cascading • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temp range: −55°C to 125°C • Balanced propag

丝印代码：HC4094M；CDx4HC4094, CD74HCT4094 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

1 Features • Buffered inputs • Separate serial outputs synchronous to both positive and negative clock edges for cascading • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temp range: −55°C to 125°C • Balanced propag

丝印代码：HC4094M；CDx4HC4094, CD74HCT4094 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

1 Features • Buffered inputs • Separate serial outputs synchronous to both positive and negative clock edges for cascading • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temp range: −55°C to 125°C • Balanced propag

丝印代码：HC4094M；CDx4HC4094, CD74HCT4094 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

1 Features • Buffered inputs • Separate serial outputs synchronous to both positive and negative clock edges for cascading • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temp range: −55°C to 125°C • Balanced propag

丝印代码：HC4094M；CDx4HC4094, CD74HCT4094 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

1 Features • Buffered inputs • Separate serial outputs synchronous to both positive and negative clock edges for cascading • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temp range: −55°C to 125°C • Balanced propag

丝印代码：HC4094M；CDx4HC4094, CD74HCT4094 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

1 Features • Buffered inputs • Separate serial outputs synchronous to both positive and negative clock edges for cascading • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temp range: −55°C to 125°C • Balanced propag

丝印代码：HC4094M；CDx4HC4094, CD74HCT4094 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

1 Features • Buffered inputs • Separate serial outputs synchronous to both positive and negative clock edges for cascading • Fanout (over temperature range) – Standard outputs: 10 LSTTL loads – Bus driver outputs: 15 LSTTL loads • Wide operating temp range: −55°C to 125°C • Balanced propag

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

8-stage shift-and-store bus register

DESCRIPTION The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines.

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER Dual operational amplifier µPC4094 is a high-speed version of the µPC4092. NECs unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/µs under voltage-follower conditions without an oscillation probl

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER Dual operational amplifier µPC4094 is a high-speed version of the µPC4092. NECs unique high-speed PNP transistor (fT = 300 MHz) in the output stage realizes a high slew rate of 25 V/µs under voltage-follower conditions without an oscillation probl