丝印代码：HC4017Q；HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS

Qualified for Automotive Applications Fully Static Operation Buffered Inputs Common Reset Positive Edge Clocking Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25°C Fanout (Over Temperature Range) − Standard Outputs . . . 10 LSTTL Loads − Bus Driver Outputs . . . 15 LSTTL Loads Bal

丝印代码：HC4017Q；HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS

Qualified for Automotive Applications Fully Static Operation Buffered Inputs Common Reset Positive Edge Clocking Typical fMAX = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25°C Fanout (Over Temperature Range) − Standard Outputs . . . 10 LSTTL Loads − Bus Driver Outputs . . . 15 LSTTL Loads Bal

5-stage Johnson counter

DESCRIPTION The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active HIGH outputs (Oo to O9), an active LOW output from the most significant flip-flop (O5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR). The

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes Page：8 Pages

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes Page：8 Pages

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes Page：8 Pages

Decade Counter/Divider with 10 Decoded Outputs, Divide-by-8 Counter/Divider with 8 Decoded Outputs

文件：165.76 Kbytes Page：8 Pages