■ DESCRIPTION

The MB90580B series is a line of general-purpose, Fujitsu 16-bit microcontrollers designed for process control applications which require high-speed real-time processing, such as consumer products.

While inheriting the AT architecture of the F2MC*1 family, the instruction set for the F2MC-16LX CPU core of the MB90580B series incorporates additional instructions for high-level languages, supports extended addressing modes, and contains enhanced multiplication and division instructions as well as a substantial collection of improved bit manipulation instructions. In addition, the MB90580B has an on-chip 32-bit accumulator which enables processing of long-word data.

The peripheral resources integrated in the MB90580B series include: an 8/10-bit A/D converter, an 8-bit D/A converter, UARTs (SCI) 0 to 4, an 8/16-bit PPG timer, 16-bit I/O timers (16-bit free-run timer, input capture units (ICUs) 0 to 3, output compare units (OCUs) 0 and 1), and an IEBusTM controller *2.

Notes: *1: F2MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED.

*2: IEBusTM is a trademark of NEC Corporation.

■ FEATURES

• Minimum execution time: 62.5 ns/4 MHz oscillation (Uses PLL clock multiplication) maximum multiplier = 4

• Maximum memory space

16 Mbyte

Linear/bank access

• Instruction set optimized for controller applications

Supported data types: bit, byte, word, and long-word types

Standard addressing modes: 23 types

32-bit accumulator enhancing high-precision operations

Signed multiplication/division and extended RETI instructions

• Enhanced high level language (C) and multitasking support instructions

Use of a system stack pointer

Symmetrical instruction set and barrel shift instructions

• Program patch function (for two address pointers)

• Enhanced execution speed: 4 byte instruction queue

• Enhanced interrupt function

Up to eight priority levels programmable

External interrupt inputs: 8 lines

• Automatic data transmission function independent of CPU operation

Up to 16 channels for the extended intelligent I/O service

DTP request inputs: 8 lines

• Internal ROM

FLASH: 128 Kbyte

MASKROM: 128 Kbyte (MB90583B) , 64 Kbyte (MB90587)

• Internal RAM

FLASH: 6 Kbyte

MASKROM: 6 Kbyte (MB90583B) , 4 Kbyte (MB90587)

• General-purpose ports

Up to 77 channels (Input pull-up resistor settable for: 24 channels. Output open drain settable for: 8 channels)

• IEBusTM controller*

Three different data transfer rates selectable

Mode 0: 3.9 Kbps (16 bytes/frame)

Mode 1: 17.0 Kbps (32 bytes/frame)

Mode 2: 26.0 Kbps (128 bytes/frame)

*: IEBusTM is a trademark of NEC Corporation.

• A/D Converter (RC) : 8 ch

8/10-bit resolution

Conversion time: 34.7 µs (Min.) , 12 MHz operation

• D/A Converter: 2 ch

8-bit resolutions

Setup time: 12.5 µs

• UART : 5 ch

• 8/16 bit PPG : 1 ch

8 bits × 2 channels: 16 bits × 1 channel: Mode switching function provided

• 16 bit reload timer: 3 ch

• 16-bit PWC timer: 1 channel

Noise filter provided. Available to pulse width counter

• 16 bit I/O timer

Input capture : 4 ch

Output compare : 2 ch

Free run timer: 1 ch

• Internal clock generator

• Time-base counter/watchdog timer: 18-bit

• Clock monitor function integrated

• Low-power consumption mode

Sleep mode

Stop mode

Hardware standby mode

CPU intermittent operation mode

• Package: LQFP-100 / QFP-100

• CMOS technology