General Description

This Data Selector/Multiplexer contains full on-chip decoding to select one-of-eight data sources as a result of a unique three-bit binary code at the Select inputs. Two complementary outputs provide both inverting and non-inverting buffer operation. An Output Control input is provided which, when at the high level, places both outputs in the high impedance OFF-State. In order to prevent bus access conflicts, output disable times are shorter than output enable times. The Select input buffers incorporate internal overlap features to ensure that select input changes do not cause invalid output transients.

Features

■ Advanced oxide-isolated, ion-implanted Schottky TTL process

■ Switching performance is guaranteed over full temperature and VCC supply range

■ Pin and functional compatible with LS family counterpart

■ Improved output transient handling capability

■ Output control circuitry incorporates power-up 3-STATE feature